Low-voltage electron emission from "tipless" field emitter arrays

Electron emission is obtained from "tipless" gated n-silicon arrays (6460 gate holes) by depositing about 10 nm of nanocrystalline graphite (NCG) on top of the gates and into the gate holes by a glow-discharge technique at 900 degreesC. The polycrystalline silicon gate diameter is 1.8 mum and the gate-to-substrate distance is 0.85 mum. The interdielectric layer is SiO2. Turn-on voltages are about 40-60 V. The gate currents are about 50% of the total emission currents. From the emission site density of the NCG films and current fluctuation measurements, it is concluded that several emission sites are generated inside the gate holes at the NCG-Si interface that exhibit gate voltage (V-g) -induced field enhancement. The field at these emission sites is expressed by E=betaV(g). (C) 2001 American Institute of Physics.