Circuit simulators aiming at single-electron integration

被引:11
作者
Fujishima, M
Amakawa, S
Hoh, K
机构
[1] Univ Tokyo, VLSI Design & Educ Ctr, Bunkyo Ku, Tokyo 113, Japan
[2] Univ Tokyo, Sch Engn, Bunkyo Ku, Tokyo 113, Japan
来源
JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS | 1998年 / 37卷 / 3B期
关键词
single electron; Coulomb blockade; tunnel junction; circuit simulator; SPICE; master equation; SET;
D O I
10.1143/JJAP.37.1478
中图分类号
O59 [应用物理学];
学科分类号
摘要
We have developed two types of single-electron simulators. One is for lower level circuit simulation, denoted as extended single-electron simulator (ESS) and the other is for higher level simulation, denoted as single electron transistor-simulation program with integrated circuit emphasis (SET-SPICE). ESS simulates small-scale arbitrary circuits with precision, performs efficient steady-state analysis besides conventional transient analysis, and visualizes probability distributions. SET-SPICE, on the other hand, simulates large-scale singie-electron-transistor circuits with relatively large node capacitances at high speed and performs co-simulation of single electron transistor (SET) and complementary metal oxide semiconductor (CMOS) circuits.
引用
收藏
页码:1478 / 1482
页数:5
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