Hecto-Scale Frame Rate Face Detection System for SVGA Source on FPGA Board

被引：5

作者：

Ding, Zheng ^{[1
]}

Zhao, Feng ^{[2
]}

Wang, Tinghui ^{[2
]}

Shu, Wei ^{[3
]}

Wu, Min-You ^{[1
,3
]}

机构：

[1] Shanghai Jiao Tong Univ, Dept Comp Sci & Engn, Shanghai 200030, Peoples R China

[2] Digilent Elect Technol Co Ltd, Shanghai, Peoples R China

[3] Univ New Mexico, Dept Elect & Comp Engn, Albuquerque, NM 87131 USA

来源：

2011 IEEE 19TH ANNUAL INTERNATIONAL SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES (FCCM) | 2011年

关键词：

Face Detection System; Field Programmable Gate Array; Haar Feature;

D O I：

10.1109/FCCM.2011.16

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper proposes techniques for face detection and gives the implementation details for an FPGA development board. We analyze and discuss the relation between the system computation cost and selection of the image scaling factor. We give a new method to select the stop threshold for the image reduction process, which reduces the total computation by half. We also provide a color image output mode to let our system enjoy more human-oriented design. Test results show that the system achieves real-time face detection speed (100fps) and a high face detection rate (87.2%) for an SVGA (600 x 800) video source. The low power consumption (3.5W) is another advantage over previous work.

引用

页码：37 / 40

页数：4

共 11 条

[1]

Cho J., 2009, FPGA 09, P103

[2]

Gao CJ, 2008, I C FIELD PROG LOGIC, P372

[3] Accelerating Viola-Jones Face Detection to FPGA-Level using GPUs [J].

Hefenbrock, Daniel ;

Oberg, Jason ;

Nhat Tan Nguyen Thanh ;

Kastner, Ryan ;

Baden, Scott B. .

2010 18TH IEEE ANNUAL INTERNATIONAL SYMPOSIUM ON FIELD-PROGRAMMABLE CUSTOM COMPUTING MACHINES (FCCM 2010), 2010, :11-18

[4] Partially Parallel Architecture for AdaBoost-Based Detection With Haar-Like Features [J].

Hiromoto, Masayuki ;

Sugano, Hiroki ;

Miyamoto, Ryusuke .

IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS FOR VIDEO TECHNOLOGY, 2009, 19 (01) :41-52

[5]

McCready R., 2000, Field-Programmable Logic and Applications. Roadmap to Reconfigurable Computing. 10th International Conference, FPL 2000. Proceedings (Lecture Notes in Computer Science Vol.1896), P157

[6]

Nvidia, 2009, NVID PROD

[7] A low cost FPGA system for high speed face detection and tracking [J].

Paschalakis, S ;

Bober, M .

2003 IEEE INTERNATIONAL CONFERENCE ON FIELD-PROGRAMMABLE TECHNOLOGY (FPT), PROCEEDINGS, 2003, :214-221

[8] Robust real-time face detection [J].

Viola, P ;

Jones, MJ .

INTERNATIONAL JOURNAL OF COMPUTER VISION, 2004, 57 (02) :137-154

[9]

Wang TH, 2010, LECT NOTES COMPUT SC, V6455, P397

[10]

Xilinx, 2010, XPOW EST

← 1 2 →