A CMOS 6-b, 400-MSample/s ADC with error correction

A CMOS 6-bit 400-MSample/s (MS/s) hash analog/digital converter (ADC) using an additional comparator for background autozeroing has been developed. Additionally, an error-correction technique detects and corrects errors after thermometer code zero-to-one transition detection, improving the error rate from 10E-4 to 10E-8 at 400 MS/s with a 200-MHz analog input, This ADC was fabricated in a single-poly, double-metal, 0.35-mu m CMOS technology and occupies 1.6 x 0.75 mm. The power consumption is 190 mW at 400 MS/s with 3.0-V power supply. This ADC has a two-clock cycle latency.