Spiral and solenoidal inductor structures on silicon using Cu-Damascene interconnects

被引：25

作者：

Edelstein, DC ^{[1
]}

Burghartz, JN ^{[1
]}

机构：

[1] IBM Corp, Div Res, TJ Watson Res Ctr, Yorktown Hts, NY 10598 USA

来源：

PROCEEDINGS OF THE IEEE 1998 INTERNATIONAL INTERCONNECT TECHNOLOGY CONFERENCE | 1998年

关键词：

D O I：

10.1109/IITC.1998.704740

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Spiral. multilevel spiral. and lateral solenoidal inductor structures are fabricated on silicon substrates by using a Cu-Damascene VLSI interconnect technology with a 4 mu m-thick Cu top laver. Some chips are mounted onto quartz substrates to suppress substrate losses. An 80-nH. 16-turn spiral inductor on quartz has a Q of 20. the highest value to date for an integrated inductor of this size.

引用

页码：18 / 20

页数：3