Finite-Element Sparse Matrix Vector Multiplication on Graphic Processing Units

被引：38

作者：

Dehnavi, Maryam Mehri ^{[1
]}

Fernandez, David M. ^{[1
]}

Giannacopoulos, Dennis ^{[1
]}

机构：

[1] McGill Univ, Dept Elect & Comp Engn, Montreal, PQ H3A 2A7, Canada

来源：

IEEE TRANSACTIONS ON MAGNETICS | 2010年 / 46卷 / 08期

关键词：

Computer architecture; graphic processing units (GPUs); parallel processing; sparse matrix vector multiplication (SMVM);

D O I：

10.1109/TMAG.2010.2043511

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

080906 [电磁信息功能材料与结构]; 082806 [农业信息与电气工程];

摘要：

A wide class of finite-element (FE) electromagnetic applications requires computing very large sparse matrix vector multiplications (SMVM). Due to the sparsity pattern and size of the matrices, solvers can run relatively slowly. The rapid evolution of graphic processing units (GPUs) in performance, architecture, and programmability make them very attractive platforms for accelerating computationally intensive kernels such as SMVM. This work presents a new algorithm to accelerate the performance of the SMVM kernel on graphic processing units.

引用

页码：2982 / 2985

页数：4

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