Scheduling semiconductor wafer fabrication by using ordinal optimization-based simulation

被引:63
作者
Hsieh, BW [1 ]
Chen, CH
Chang, SC
机构
[1] Natl Taiwan Univ, Dept Elect Engn, Taipei 10764, Taiwan
[2] George Mason Univ, Dept Syst Engn & Operat Res, Fairfax, VA 22030 USA
[3] Natl Taiwan Univ, Grad Inst Ind Engn, Taipei 10764, Taiwan
来源
IEEE TRANSACTIONS ON ROBOTICS AND AUTOMATION | 2001年 / 17卷 / 05期
基金
美国国家科学基金会;
关键词
dispatching; ordinal optimization; scheduling; semiconductor wafer fabrication; simulation;
D O I
10.1109/70.964661
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Computational efficiency is one of the major challenges of applying simulation to short-term operation scheduling of semiconductor wafer fabrication factories (fabs), which are characterized by re-entrant process flows, stringent production control requirements and fast changing technology and business environments. This paper explores the application of the ordinal optimization (OO)-based simulation technique to efficiently selecting good rules for scheduling wafer fabrications. An efficient simulation tool, which makes use of OO and optimal computing budget allocation techniques, is developed. Experiments with the OO-based simulation tool are conducted for static selection of good rules under different factors such as initial state, performance index and time horizon. Results indicate that one to two orders of computation time reduction over traditional simulations can be achieved and that what rules are good varies with factors of initial state, performance index and time horizon. These results motivate our further investigation about applications to dynamic selection of dispatching rules upon the occurrence of two significant uncertain events: holding of significant amount of wafers-in-process due to engineering causes and major machine failures. Results demonstrate the value of dynamic rule selection for uncertainty handling, the insightful selection of good rules and the needs for future research.
引用
收藏
页码:599 / 608
页数:10
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