Dual high-k gate dielectric with poly gate electrode:: HfSiON on nMOS and Al2O3 capping layer on pMOS

被引:39
作者
Li, HJ [1 ]
Gardner, MI [1 ]
机构
[1] Int SEMATECH, Austin, TX 78741 USA
关键词
Al2O3; dielectric devices; dielectric films; HfSiON;
D O I
10.1109/LED.2005.85.1093
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this letter, a novel dual high-kappa approach, different high-kappa. dielectrics in nMOS and pMOS, with poly Si gate electrode is introduced. By turning the Fermi-pinning effect into an advantage, this dual high-kappa. approach achieved a lower V-tp and a symmetrical V-tn /V-tp over a wide range of channel lengths for potential high-kappa/poly Si CMOS application. In addition to the V-t control, this approach also can improve the drive current ratio between nMOS and pMOS, which would further scale the CMOS area by reducing the pMOS width.
引用
收藏
页码:441 / 444
页数:4
相关论文
共 5 条
[1]  
CARTIER E, 2004, S VLSI TECH DIG
[2]   Adjustment for baseline measurement error in randomized controlled trials induces bias [J].
Chan, SF ;
Macaskill, P ;
Irwig, L ;
Walter, SD .
CONTROLLED CLINICAL TRIALS, 2004, 25 (04) :408-416
[3]  
HOBBS C, 2003, S VLSI TECH DIG
[4]  
Hobbs CC, 2004, IEEE T ELECTRON DEV, V51, P978, DOI 10.1109/TED.2004.829510
[5]  
Samavedam SB, 2003, 2003 IEEE INTERNATIONAL ELECTRON DEVICES MEETING, TECHNICAL DIGEST, P307