Design criteria for modified Zeta rectifier with reduced voltage stress and low effect on main

被引：4

作者：

Sabzali, Ahmad J. ^{[1
]}

Ismail, Esam H. ^{[1
]}

Al-Saffar, Mustafa A. ^{[1
]}

机构：

[1] Coll Technol Studies, Dept Elect Engn, Hawalli 32041, Kuwait

来源：

ENERGY CONVERSION AND MANAGEMENT | 2008年 / 49卷 / 02期

关键词：

Zeta (dual SEPIC) converter; power factor correction (PFC); low harmonic rectifier; power factor preregulator;

D O I：

10.1016/j.enconman.2007.06.034

中图分类号：

O414.1 [热力学];

学科分类号：

摘要：

A single switch low harmonic rectifier based on the Zeta converter, also known as dual of single ended primary inductance converter (dual SEPIC), is presented in this paper. By adding an extra diode in series with both inductors, new discontinuous current modes (DCM) are obtained. By selecting the right DCM, it is possible to design the rectifier such that the voltage on the intermediate dc-link capacitor is less than the output DC voltage. This will result in reduced voltage stress on the main power switch, as well as zero current switching at turn on. The operating principles are confirmed with computer simulation and experimental results. (C) 2007 Published by Elsevier Ltd.

引用

页码：157 / 168

页数：12

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