Utilization of on-line (concurrent) checkers during built-in self-test and vice versa

被引:8
作者
Gupta, SK [1 ]
Pradhan, DK [1 ]
机构
[1] TEXAS A&M UNIV, DEPT COMP SCI, COLLEGE STN, TX 77843 USA
基金
美国国家科学基金会;
关键词
built-in self-test; BIST; concurrent checking; fault-escape probability; parity prediction;
D O I
10.1109/12.481487
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Concurrent checkers are commonly used in computer systems to detect computational errors on-line, which enhances reliability. Using the coding theory framework developed earlier by the authors, it is shown in the following that concurrent checkers, already available within the circuit, can be utilized very effectively during off-line testing. Specifically, test time as well as fault escape probability can both be reduced simultaneously. The proposed combined scheme can be implemented with simple modification of existing hardware. Also shown is a novel use of BIST hardware for concurrent checking. Specifically proposed is a novel, dual use of concurrent checkers and built-in self-test hardware, yielding mutual advantage.
引用
收藏
页码:63 / 73
页数:11
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