As the critical dimension (CD) for semiconductor devices continues to shrink, new thin-layer imaging processes such as bilayer, Top-Surface Imaging (TSI), Plasma Polymerized Methylsilane (PPMS)(1,2), and CARL(3) may be required. However, features patterned with these non-traditional processes have inherent high-frequency edge-roughness. If this edge-roughness can not be reduced, it will limit the use of these processes below 0.15 mu m by reducing process latitude, since the edge-roughness contributes to CD variation and possibly affects device reliability. In order to measure the edge-roughness, a quantitative metrology method needs to be developed. This paper covers the use of a Digital Instruments AFM, a Veeco AFM, an old FE SEM, and a new high resolution SEM for the measurement of the edge-roughness of these patterned features. Quantitative measurements, both in magnitude and spatial frequency are described for each metrology tool. Discussions are made of the parameters that limit the edge-roughness measurement and compared to the parameters that are known to affect CD measurement. Examples of measured edge-roughness are given for a variety of dry developed samples including features processed with an oxide hard mask and TSI. Edge-roughness of chrome features on the reticle, patterned TSI features, and patterned single-layer features are compared to confirm that the higher frequency roughness observed in TSI is not transferred from the reticle.