System power management support in the IBM POWER6 microprocessor

被引：56

作者：

Floyd, M. S. ^{[1
]}

Ghiasi, S. ^{[1
]}

Keller, T. W. ^{[1
]}

Rajamani, K. ^{[1
]}

Rawson, F. L. ^{[1
]}

Rubio, J. C. ^{[1
]}

Ware, M. S. ^{[1
]}

机构：

[1] IBM Syst & Technol Grp, Austin, TX 78758 USA

来源：

IBM JOURNAL OF RESEARCH AND DEVELOPMENT | 2007年 / 51卷 / 06期

关键词：

D O I：

10.1147/rd.516.0733

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

The IBM POWER6(TM) microprocessor chip supports advanced, dynamic power management solutions for managing not just the chip but the entire server. The design facilitates a programmable power management solution for greater flexibility and integration into system- and data-center-wide management solutions. The design of the POWER6 microprocessor provides real-time access to detailed and accurate information on power, temperature, and performance. Together, the sensing, actuation, and management support available in the POWER6 processor, known as the EnergyScale(TM) architecture, enables higher performance, greater energy efficiency, and new power management capabilities such as power and thermal capping and power savings with explicit performance control. This paper provides an overview of the innovative design of the POWER6 processor that enables these advanced, dynamic system power management solutions.

引用

页码：733 / 746

页数：14

共 14 条

[1]

[Anonymous], 2005, Proceedings of the 19th Annual International Conference on Supercomputing

[2]

[Anonymous], RC24007 IBM

[3] High-performance CMOS variability in the 65-nm regime and beyond [J].

Bernstein, K. ;

Frank, D. J. ;

Gattiker, A. E. ;

Haensch, W. ;

Ji, B. L. ;

Nassif, S. R. ;

Nowak, E. J. ;

Pearson, D. J. ;

Rohrer, N. J. .

IBM JOURNAL OF RESEARCH AND DEVELOPMENT, 2006, 50 (4-5) :433-449

[4]

Drake A., 2007, 2007 IEEE International Solid-State Circuits Conference (IEEE Cat. No.07CH37858), P398, DOI 10.1109/ISSCC.2007.373462

[5]

DREPS DM, 2001, Patent No. 6334163

[6]

FERRIOLO F, 1999, HOT CHIPS 11 S HIGH

[7]

FLOYD MS, 2003, Patent No. 6529979

[8]

ISCI C, 2005, HARDW PERF MON DES F

[9]

KOTLA R, 2005, P 19 INT PAR DISTR P

[10]

LEFURGY C, 2003, IEEE COMPUT, P30

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