The digital ASIC for the Digital Front End Electronics of the SPI astrophysics gamma-ray experiment

被引：8

作者：

Lafond, E ^{[1
]}

Mur, M ^{[1
]}

Schanne, S ^{[1
]}

机构：

[1] CEA Saclay, DSM, DAPNIA, Serv Elect & Informat, F-91191 Gif Sur Yvette, France

来源：

IEEE TRANSACTIONS ON NUCLEAR SCIENCE | 1998年 / 45卷 / 04期

关键词：

D O I：

10.1109/23.710946

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

The SPI spectrometer [1] is one of the gamma-ray astronomy instruments that will be installed an the ESA INTEGRAL satellite [2]. intended to be launched in 2001 by the European Space Agency. The Digital Front-End Electronics sub-system (DFEE) is in charge of the real time data processing of the various measurements produced by die Germanium (Ge) detectors and the Bismuth Germanate (BGO) anti-coincidence shield. The central processing unit of the DFEE is implemented in a digital ASIC circuit. which provides the real time association of the various time signals, acquires the associated energy measurements, and classifies the various types of physics events. The paper gives the system constraints of the DFEE, the architecture of the ASIC circuit, the technology requirements. and the strategy for test and integration. Emphasis is given to the high level language development and simulation, the automatic circuit synthesis approach, and the performance estimation.

引用

页码：1836 / 1839

页数：4