Stochastic assembly of sublithographic nanoscale interfaces

被引:86
作者
DeHon, A
Lincoln, P
Savage, JE
机构
[1] CALTECH, Dept Comp Sci, Pasadena, CA 91109 USA
[2] SRI Int, Comp Sci Lab, Menlo Pk, CA 94025 USA
[3] Brown Univ, Dept Comp Sci, Providence, RI 02903 USA
基金
美国国家科学基金会;
关键词
bootstrapping; electronic nanotechnology; molecular electronics; nanoscale interfacing; stochastic assembly;
D O I
10.1109/TNANO.2003.816658
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
We describe a technique for addressing individual nanoscale wires with microscale control wires without using lithographic-scale processing to define nanoscale dimensions. Such a scheme is necessary to exploit sublithographic nanoscale storage and computational devices. Our technique uses modulation doping to address individual nanowires and self-assembly to organize them into nanoscale-pitch decoder arrays. We show that if coded nanowires are chosen at random from a sufficiently large population, we can ensure that a large fraction of the selected nanowires have unique addresses. For example, we show that N lines can be uniquely addressesd over 99% of the time using no more than [2.2 log(2) (N)] + 11 address wires. We further show a hybrid decoder scheme that only needs to address N = O (Wlitho-pitch/Wnano-pitch) wires at a time through this stochastic scheme; as a result, the number of unique codes required for the nanowires does not grow with decoder size. We give an O(N-2) procedure to discover the addresses which are present. We also demonstrate schemes that tolerate the misalignment of nanowires which can occur during the self-assembly process.
引用
收藏
页码:165 / 174
页数:10
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