Overlay target design characterization and optimization for tungsten CMP.

被引:5
作者
Hsu, S [1 ]
Dusa, M [1 ]
Vlassak, J [1 ]
Harker, C [1 ]
Zimmerman, M [1 ]
机构
[1] Natl Semicond Corp, Santa Clara, CA 95052 USA
来源
METROLOGY, INSPECTION, AND PROCESS CONTROL FOR MICROLITHOGRAPHY XII | 1998年 / 3332卷
关键词
tungsten CMP; overlay target design; overlay metrology; stepper alignment; stepper modeling; overlay target noise;
D O I
10.1117/12.308744
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
As the semiconductor industry pushes design rules to 0.25 micron and below, tungsten chemical mechanical polishing (WCMP) is emerging as a key process that reduces defect density, increases circuit density and improves yield. However, due to the non-selective nature of the WCMP process, the stepper alignment marks and the overlay metrology target can be seriously damaged during the polishing process. The result of this damage may contribute to the total misregistration error. This paper describes a systematic overlay target optimization on various WCMP layers in order to evaluate and reduce target and measurement noise. Eight different target designs were evaluated on three different metal layers. The quantification of overall measurement counts, measurement precision, modeled residual, and kernel analysis was used as the metric for determining the overall effectiveness of each overlay target design. Short and long term gauge studies were performed to verify the measurement capability of the metrology tool. An experiment was performed in which a known offset was introduced on the stepper to confirm that the overlay measurement responded accordingly. To verify the robustness of the target, oxide thickness, tungsten thickness and polish lime were varied on one of the three layers. The measured overlay error was also correlated to cross-section scanning electron microscope (SEM) results.
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页码:360 / 370
页数:11
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