Accurate hardware-based stereo vision

被引:115
作者
Ambrosch, Karina [1 ]
Kubinger, Wilfried [1 ]
机构
[1] AIT Austrian Inst Technol, A-1220 Vienna, Austria
关键词
Stereo vision; Embedded; Real-time; FPGA; ASIC; VLSI;
D O I
10.1016/j.cviu.2010.07.008
中图分类号
TP18 [人工智能理论];
学科分类号
140502 [人工智能];
摘要
To enable both accurate and fast real-time stereo vision in embedded systems, we propose a novel stereo matching algorithm that is designed for high efficiency when realized in hardware. We evaluate its accuracy using the Middlebury Stereo Evaluation, revealing its high performance at minimum tolerance. To outline the resource efficiency of the algorithm, we present its realization as an Intellectual Property (IP) core that is designed for the deployment in Field Programmable Gate Arrays (FPGAs) and Application Specific Integrated Circuits (ASICs). (c) 2010 Elsevier Inc. All rights reserved.
引用
收藏
页码:1303 / 1316
页数:14
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