System-on-a-chip cosimulation and compilation

被引：25

作者：

Liem, C

Nacabal, F

Valderrama, C

Paulin, P

Jerraya, A

机构：

[1] INST NATL POLYTECH GRENOBLE, LAB TIMA, F-38031 GRENOBLE, FRANCE

[2] CNRS, F-75700 PARIS, FRANCE

[3] TIMA LAB, SYST LEVEL SYNTH GRP, GRENOBLE, FRANCE

来源：

IEEE DESIGN & TEST OF COMPUTERS | 1997年 / 14卷 / 02期

关键词：

D O I：

10.1109/54.587736

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Complex consumer products with multiple functions on a single chip demand new design and verification methods for interfunctioning hardware and software components. The authors' new techniques address this need.

引用

页码：16 / 25

页数：10

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Nacabal, F ;

Paulin, P ;

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[10]

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