A 64-point Fourier transform chip for video motion compensation using phase correlation

被引:20
作者
Hui, CCW
Ding, TJ
McCanny, JV
Woods, RF
机构
关键词
D O I
10.1109/JSSC.1996.542320
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Details of a new low power fast Fourier transform (FFT) processor for use in digital television applications are presented, This has been fabricated using a 0.6-mu m CMOS technology and can perform a 64 point complex forward or inverse FFT on real-time video at up to 18 Megasamples per second, It comprises 0.5 million transistors in a die area of 7.8 x 8 mm(2) and dissipates 1 W, The chip design is based on a novel VLSI architecture which has been derived from a first principles factorization of the discrete Fourier transform (DFT) matrix and tailored to a direct silicon implementation.
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页码:1751 / 1761
页数:11
相关论文
共 25 条
[1]   A PIPELINED FFT PROCESSOR FOR WORD-SEQUENTIAL DATA [J].
BI, G ;
JONES, EV .
IEEE TRANSACTIONS ON ACOUSTICS SPEECH AND SIGNAL PROCESSING, 1989, 37 (12) :1982-1985
[2]  
BIDET E, 1995, IEEE J SOLID STATE C, V30
[3]  
BORER T, 1992, THESIS U SURREY, pCH7
[4]  
CHEN C, 1992, IEEE INT S CIRCUITS, V6, P689
[5]   AN ALGORITHM FOR MACHINE CALCULATION OF COMPLEX FOURIER SERIES [J].
COOLEY, JW ;
TUKEY, JW .
MATHEMATICS OF COMPUTATION, 1965, 19 (90) :297-&
[6]  
DILECCE V, 1991, EPE 91, V3, P527
[7]   2D GRID ARCHITECTURES FOR THE DFT AND THE 2D DFT [J].
GHOUSE, MA .
JOURNAL OF VLSI SIGNAL PROCESSING, 1993, 5 (01) :57-74
[8]   PARALLELISM IN FAST FOURIER-TRANSFORM HARDWARE [J].
GOLD, B ;
BIALLY, T .
IEEE TRANSACTIONS ON AUDIO AND ELECTROACOUSTICS, 1973, AU21 (01) :5-16
[9]  
HUI CCW, 1995, THESIS QUEENS U BELF
[10]  
LIM H, 1994, INT C APPL SPEC ARR, P123