Recent advances in silicon etching for MEMS using the ASE™ process

被引：145

作者：

Hynes, AM ^{[1
]}

Ashraf, H ^{[1
]}

Bhardwaj, JK ^{[1
]}

Hopkins, J ^{[1
]}

Johnston, I ^{[1
]}

Shepherd, JN ^{[1
]}

机构：

[1] Surface Technol Syst, Newport NP1 9UJ, Shrops, England

来源：

SENSORS AND ACTUATORS A-PHYSICAL | 1999年 / 74卷 / 1-3期

关键词：

silicon etching; MEMS; ASE; parameter ramping;

D O I：

10.1016/S0924-4247(98)00326-4

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In the ongoing enhancement of MEMS applications, the STS Advanced Silicon Etch, ASE(TM), process satisfies the demanding requirements of the industry. Typically, highly anisotropic, high aspect ratios profiles with fine CD control are required. Selectivities to photoresist of 150:1 with Si etch rates of up to 7 mu m/min are achievable. Applications range from shallow etched optical devices to through wafer membrane etches. This paper details some of the fundamental trends of the ASE(TM) process and goes on to discuss how the process has been enhanced to meet product specifications. Parameter ramping is a powerful technique used to achieve the often conflicting requirements of high etch rate with good profile/CD control. The results are presented in this paper. (C) 1999 Elsevier Science S.A. All rights reserved.

引用

页码：13 / 17

页数：5