Post-CMOS integration of germanium microstructures

被引:49
作者
Franke, AE [1 ]
Bilic, D [1 ]
Chang, DT [1 ]
Jones, PT [1 ]
King, TJ [1 ]
Howe, RT [1 ]
Johnson, GC [1 ]
机构
[1] Univ Calif Berkeley, Dept Elect Engn & Comp Sci, Berkeley, CA 94720 USA
来源
MEMS '99: TWELFTH IEEE INTERNATIONAL CONFERENCE ON MICRO ELECTRO MECHANICAL SYSTEMS, TECHNICAL DIGEST | 1999年
关键词
D O I
10.1109/MEMSYS.1999.746901
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Polycrystalline germanium (poly-Ge) microstructures have been fabricated on standard CMOS wafers. Conventional low pressure chemical vapor deposition (LPCVD) and rapid thermal annealing (RTA) processes were used to achieve low-resistivity (2.3 m Omega-cm) tensile poly-Ge structural films, with a thermal budget which is compatible with Al (2% Si) metallization. The CMOS circuitry was passivated with low-temperature oxide and amorphous Si; the latter served as a mask against HF during the microstructure release etch. Comb-drive microresonators with integrated trans-resistance amplifiers were used to demonstrate feasibility of this integration strategy. Preliminary measurements on test structures indicate that poly-Ge has promising material properties. Its fracture strength is 2.2 GPa +/- 0.4 GPa, which is comparable to that of poly-Si. Clamped-clamped lateral resonator test structures have quality factors in vacuum as high as similar to 30,000. For the process conditions used in this work, the residual stress of as-deposited poly-Ge is -79 MPa (compressive); RTA shifts the stress to 203 MPa (tensile). Deposition and annealing conditions have yet to be optimized to minimize stress.
引用
收藏
页码:630 / 637
页数:8
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