Prognostic methodology for deep submicron semiconductor failure modes

被引:20
作者
Goodman, DL [1 ]
机构
[1] Ridgetop Grp Inc, Tucson, AZ 85740 USA
来源
IEEE TRANSACTIONS ON COMPONENTS AND PACKAGING TECHNOLOGIES | 2001年 / 24卷 / 01期
关键词
D O I
10.1109/6144.910810
中图分类号
T [工业技术];
学科分类号
08 [工学];
摘要
Semiconductor reliability issues are beginning to emerge as a major impediment to long term reliability of critical systems such as Internet routers, ATM machines, and Automotive/Aerospace fly-by-wire systems. Semiconductors have certain defined failure modes that can contribute to end-of-life failures. These modes include time-dependent dielectric breakdown of the gate oxide (TDDB), hot carrier damage, and metal migration. All of these common failure modes are far worse at geometries below 0.25 u. Fortunately, there are methods proposed that counteract these common failure modes. This paper surveys the problems involved, and recommends a methodology for the inclusion of pre-calibrated prognostic cells that can be co-located with a host circuit to provide an "early-warning" of a system failure, so that appropriate corrective action can be taken.
引用
收藏
页码:109 / 111
页数:3
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