Nanowire to Single-Electron Transistor Transition in Trigate SOI MOSFETs

被引：8

作者：

Akhavan, Nima Dehdashti ^{[1
]}

Afzalian, Aryan ^{[1
]}

Lee, Chi-Woo ^{[1
]}

Yan, Ran ^{[1
]}

Ferain, Isabelle ^{[1
]}

Razavi, Pedram ^{[1
]}

Yu, Ran ^{[1
]}

Fagas, Giorgos ^{[1
]}

Colinge, Jean-Pierre ^{[1
]}

机构：

[1] Natl Univ Ireland Univ Coll Cork, Tyndall Natl Inst, Cork, Ireland

来源：

IEEE TRANSACTIONS ON ELECTRON DEVICES | 2011年 / 58卷 / 01期

基金：

爱尔兰科学基金会;

关键词：

low-dimensional structures; low temperature; quantum transport; silicon nanowire transistor; tunnel-barrier field-effect transistor (FET); 3-D device modeling; BALLISTIC TRANSPORT; SILICON; SIMULATION;

D O I：

10.1109/TED.2010.2084390

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

080906 [电磁信息功能材料与结构]; 082806 [农业信息与电气工程];

摘要：

We investigate the effect of symmetrical geometrical constrictions on the electrical characteristics of ultrathin silicon-on-insulator nanowires with a trigate structure using a 3-D numerical quantum simulator. Introducing barriers at the source and drain junctions profoundly alter the device physics and a transition from 1-D to 0-D quantum behavior is observed. The constrictions create resonance levels in the channel region of nanowire due to confinement in the three directions of space, which, in turn, causes oscillation of the I-D-V-CS characteristic. Based on the observed characteristics, we derive a set of parameters that draws the line between 1-D and 0-D quantum behavior of silicon nanowire transistors.

引用

页码：26 / 32

页数：7

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