Novel silicon epitaxy for advanced MOSFET devices

被引：20

作者：

Neudeck, GW ^{[1
]}

Su, TC ^{[1
]}

Denton, JP ^{[1
]}

机构：

[1] Purdue Univ, W Lafayette, IN 47907 USA

来源：

INTERNATIONAL ELECTRON DEVICES MEETING 2000, TECHNICAL DIGEST | 2000年

关键词：

D O I：

10.1109/IEDM.2000.904285

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Silicon Selective Epitaxial Growth (SEG) and Epitaxial Lateral Overgrowth provide a technology for fabricating thin SOI device islands, fully self-aligned double gate SOI MOSFETs and multiple layers of SOI devices. Sub-micron P-MOSFETs in 2 SOI layers of SOI islands and the double-gate fully-depleted devices show low off currents < 0.2pA/<mu>m with low vlaues of sub-threshold slopes (<70mV/dec).

引用

页码：169 / 172

页数：4

共 12 条

[1]

BASHIR R, 2000, JVST B APR

[2] Fully depleted dual-gated thin-film SOI P-MOSFET's fabricated in SOI islands with an isolated buried polysilicon backgate [J].