A CMOS IF transceiver with reduced analog complexity

被引:8
作者
Paulus, T [1 ]
Somayajula, SS [1 ]
Miller, TA [1 ]
Trotter, B [1 ]
Choi, K [1 ]
Kerth, DA [1 ]
机构
[1] Crystal Semicond, Austin, TX 78744 USA
关键词
analog-digital conversion; digital-analog conversion; digital radio; IF systems; mixed analog-digital integrated circuits; sigma-delta modulation; signal processing; transceivers;
D O I
10.1109/4.735559
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Signal processing techniques are used to minimize the analog complexity in an intermediate-frequency (IF) transceiver. The receiver digitizes the IF signal directly by subsampling and complex bandpass delta-sigma modulation. A new loop filter is proposed for use in the complex delta-sigma. Digital demodulation and filtering are then used to extract the baseband information. The transmit section converts: baseband to IF through an all-digital signal path. A bandpass delta-sigma modulator quantizes the digital IF signal to 1 bit in order to simplify the IF output digital-to-analog converter/driver, The output driver provides analog finite impulse response filtering for quantization noise.
引用
收藏
页码:2154 / 2159
页数:6
相关论文
共 2 条
[1]   An 81MHz IF receiver in CMOS [J].
Hairapetian, A .
1996 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE, DIGEST OF TECHNICAL PAPERS, 1996, 39 :56-57
[2]   A quadrature bandpass Sigma Delta modulator for digital radio [J].
Jantzi, S ;
Martin, K ;
Sedra, A .
1997 IEEE INTERNATIONAL SOLID-STATE CIRCUITS CONFERENCE - DIGEST OF TECHNICAL PAPERS, 1997, 40 :216-217