A flexible heterogeneous video processor system for television applications

被引：8

作者：

Jaspers, EGT

de With, PHN

Janssen, JGWM

机构：

[1] Philips Res Labs, NL-5656 AA Eindhoven, Netherlands

[2] Univ Mannheim, Dept Circ & Simulat, D-68131 Mannheim, Germany

来源：

IEEE TRANSACTIONS ON CONSUMER ELECTRONICS | 1999年 / 45卷 / 01期

关键词：

TV; multi-window; display processing; co-processor; PiP; scaling; processor architecture;

D O I：

10.1109/30.754411

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A new video processing architecture for high-end TV applications is presented, featuring a flexible heterogeneous multi-processor architecture, executing video tasks in parallel and independently. The signal how graph and the processors are programmable, enabling an optimal picture quality for different TV display modes. The concept is verified by an experimental chip design. The architecture allows several video streams to be processed and displayed in parallel and in a programmable way, with an individual signal quality.

引用

页码：1 / 12

页数：12