Deposition and simulation of refractory barriers into high aspect ratio re-entrant features using directional sputtering

被引：3

作者：

Smy, T ^{[1
]}

Joshi, RV ^{[1
]}

Tait, N ^{[1
]}

Dew, SK ^{[1
]}

Brett, MJ ^{[1
]}

机构：

[1] Carleton Univ, Dept Elect, Ottawa, ON K1S 5B6, Canada

来源：

INTERNATIONAL ELECTRON DEVICES MEETING 1998 - TECHNICAL DIGEST | 1998年

关键词：

D O I：

10.1109/IEDM.1998.746362

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

In this paper three unique facts are demonstrated for the first time: 1) it is possible to deposit by directional spluttering refractory barrier layers such as Ti, TiN and W over re-entrant VLSI topography with aspect ratios greater then 6. 2) Variation of the film microstructure down the via occurs;and can be verified by simulations. 3) Simulation of the microstructure and profile of the deposited film can be used to determine the physics of the redeposition of material on the undercut regions. Using simulations it is determined that the most likely source of the re-emission is resputtering due to neutral bombardment.

引用

页码：311 / 314

页数：4