Transmission-line load-network topology for class-E power amplifiers

Class-E amplifiers are a type of switching amplifier offering very high efficiency approaching 100%, In this paper, a topology and design methodology, which could be used for a transmission-line implementation of a class-E power amplifier, is presented. A simple transmission-line class-E load network is proposed that offers combined transformation of the load resistance down to a suitable level, as well as simultaneous suppression of harmonics in the load. The load network was developed and tested with the aid of a time-domain simulator (i.e., SPICE), A microstrip layout was designed and a first prototype was built operating at 1 GHz utilizing a held-effect transistor as the switching device, A drain efficiency of 72% was measured for our prototype after tuning, although better performance can be expected with an improved switching transistor and careful tuning of the load network.