A design environment for high throughput, low power dedicated signal processing systems

被引：12

作者：

Davis, WR ^{[1
]}

Zhang, N ^{[1
]}

Camera, K ^{[1
]}

Chen, F ^{[1
]}

Markovic, D ^{[1
]}

Chan, N ^{[1
]}

Nikolic, B ^{[1
]}

Brodersen, RW ^{[1
]}

机构：

[1] Univ Calif Berkeley, Berkeley, CA 94720 USA

来源：

PROCEEDINGS OF THE IEEE 2001 CUSTOM INTEGRATED CIRCUITS CONFERENCE | 2001年

关键词：

D O I：

10.1109/CICC.2001.929839

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A hierarchical automated design flow for low-energy direct-mapped signal processing integrated circuits is presented. A modular framework based on a combined Simulink and floorplan description drives automatic layout generation. Automatic characterization of layout improves system-level estimates. The flow is demonstrated on the subsystems of CDMA and OFDM receivers and a 300k transistor test-chip.

引用

页码：545 / 548

页数：4