Single poly EEPROM for smart power IC's

被引：7

作者：

Carman, E ^{[1
]}

Parris, P ^{[1
]}

Chaffai, H ^{[1
]}

Cotdeloup, F ^{[1
]}

Debortoli, S ^{[1
]}

Hemon, E ^{[1
]}

Lin-Kwang, J ^{[1
]}

Perat, O ^{[1
]}

Sicard, T ^{[1
]}

机构：

[1] Motorola Inc, Geneva, Switzerland

来源：

12TH INTERNATIONAL SYMPOSIUM ON POWER SEMICONDUCTOR DEVICES & ICS - PROCEEDINGS | 2000年

关键词：

EEPROM; single poly EEPROM;

D O I：

10.1109/ISPSD.2000.856800

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Smart power integrated circuits need low density memory for applications such as trimming, IC customization, system addresses, and part traceability with few program/erase cycles. Memory solutions must be low cost and demonstrate high reliability in automotive environments. Programmability in the application is an advantage. We have developed a single poly EEPROM that meets these requirements and in addition gives significant die area savings over traditional low cost memory techniques.

引用

页码：177 / 179

页数：3