Multiple t(ox) is thoroughly investigated for nitrogen-implanted gate oxides with the optimization of Q(BD) and a demonstration of 2-GHz counters. Furnace growth at 800 degrees C, 850 degrees C, and 900 degrees C is compared with rapid-thermal-oxidation (RTO) at 1050 degrees C. A wide range of reduced growth rate, 20% to 80%, is achieved that meets the SIA road-map for the next few generations of the CMOS technology. Optimization of charge-to-breakdown (Q(BD)) is achieved through investigation of the nitrogen distribution profile in the oxide that is affected by the growth temperature, nitrogen implant dose, and post-oxidation anneals. 10(15)/cm(2) nitrogen dose results in a higher Q(BD). as well as a tighter tail distribution of Q(BD) than 5x10(14)/cm(2) nitrogen dose. The tight distribution of Q(BD) is important for yield improvement. If the oxide is either grown or annealed at 900 degrees C, Q(BD) is as good as the Q(BD) Of regular oxide without nitrogen. As an example of integration, 0.18-mu m CMOS devices with dual gate oxides of 3 nm and 4 mm are fabricated and characterized at 1.5, 1.8, and 2.5 V. Performance of divide-by-3 counters is evaluated with the consideration of parasitic RC delays, and the results are superior to the most recently published data. At room temperatures, the maximum toggle frequency (f(T)) is higher than 2 GHz for both 1.8 and 2.5 V operation, with a power dissipation of 3.4 mu W at 85 degrees C. To further reduce the power dissipation to 0.08 mu W, 1.5-V operation gives 1-GHz f(T) also at 85 degrees C.
