1.8 million transistor CMOS ASIC fabricated in a SiGe BiCMOS technology

被引：9

作者：

Johnson, RA ^{[1
]}

Zierak, MJ ^{[1
]}

Outama, KB ^{[1
]}

Bahn, TC ^{[1
]}

Joseph, AJ ^{[1
]}

Cordero, CN ^{[1
]}

Malinowski, J ^{[1
]}

Bard, KA ^{[1
]}

Weeks, TW ^{[1
]}

Milliken, RA ^{[1
]}

Medve, TJ ^{[1
]}

May, GA ^{[1
]}

Chong, W ^{[1
]}

Walter, KM ^{[1
]}

Tempest, SL ^{[1
]}

Chau, BB ^{[1
]}

Boenke, M ^{[1
]}

Nelson, MW ^{[1
]}

Harame, DL ^{[1
]}

机构：

[1] IBM Corp, Microelect Div, Essex Junction, VT 05452 USA

来源：

INTERNATIONAL ELECTRON DEVICES MEETING 1998 - TECHNICAL DIGEST | 1998年

关键词：

D O I：

10.1109/IEDM.1998.746330

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

To investigate the potential of high level integration in SiGe BiCMOS, we have fabricated a 1.8 million transistor CMOS ASIC testsite (8.06 mm x 8.06 mm) alongside various SiGe heterojunction bipolar transistor (HBT) circuits and yield monitor structures. The ASIC testsite was used to validate the ASIC library elements, perform hardware to model correlation, and for reliability, ESD, hot electron and thermal cycle stressing. We have verified that the incorporation of high-speed bipolar devices does not degrade the operation and reliability of VLSI CMOS circuits, resulting in an ideal BiCMOS process to fabricate a single-chip radio for wireless communications. This circuit represents the largest circuit ever built in a SiGe BiCMOS technology.

引用

页码：217 / 220

页数：4