A 9.5mW 330μsec 1024-point FFT processor

被引:5
作者
Baas, BM [1 ]
机构
[1] Stanford Univ, Dept Elect Engn, Stanford, CA 94305 USA
来源
IEEE 1998 CUSTOM INTEGRATED CIRCUITS CONFERENCE - PROCEEDINGS | 1998年
关键词
D O I
10.1109/CICC.1998.694921
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper presents an energy-efficient, single-chip, 1024-point FFT processor. The full-custom, 460,000-transistor design has been fabricated in a standard 0.7 mu m (L-poly = 0.6 mu m) CMOS process and is fully functional on first-pass silicon. At a supply voltage of 1.1V, it calculates a 1024-point complex FFT in 330 mu sec at a clock speed of 16 MHz while consuming 9.5 mW, resulting in an adjusted energy efficiency more than 16 times greater than the previously most-efficient known FFT processor. At 3.3V, it operates at 173 MHz.
引用
收藏
页码:127 / 130
页数:4
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