FAIR - Fast Assessment of Interconnect Reliability

The need far fast assessment of solder joint thermal fatigue life of surface mount packages motivated this development of a semi-analytic model, FAIR, based on the AT&T CSMR (comprehensive surface mount reliability) model. FAIR has three elements: (1) Validated mechanical properties of 63Sn-37Pb. The elastic and plastic properties from different publications were compared and shown to be in good agreements, but the steady state creep rates were not. Creep tests of solder joints were conducted and the measured creep rates were between Wang's and Darveaux's equations. (2) Improved calculation of stress and strain in the solder joint during a thermal cycle. The analytic expression of stress relaxation was derived. The lead compliance calculation based on Kotlowitz's formula was modified. The method for quick formation of the closed stress vs strain loop was proposed. Bending, tension, and compression of package and printed circuit board (PCB) were included. (3) Verified fatigue life vs, damage parameter relation. The CSMR database was decoded from the publication. Isothermal fatigue test of solder joints were performed, the results support the CSMR database of Fatigue life per solder joint area vs inelastic strain energy. The results of thermal chamer tests of TSOPs (thin small outline packages) fit well with the CSMR database.