Three-level converter topologies with switch breakdown fault-tolerance capability

被引：104

作者：

Ceballos, Salvador ^{[1
]}

Pou, Josep ^{[2
]}

Robles, Eider ^{[1
]}

Gabiola, Igor ^{[1
]}

Zaragoza, Jordi ^{[2
]}

Villate, Jose Luis ^{[1
]}

Boroyevich, Dushan ^{[3
]}

机构：

[1] Robotiker Tecnalia Res Ctr, Energy Unit, Zamudio 48170, Spain

[2] Tech Univ Catalonia, Terrassa, Spain

[3] Virginia Polytech Inst & State Univ, Bradley Dept Elect & Comp Engn, Blacksburg, VA 24061 USA

来源：

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS | 2008年 / 55卷 / 03期

关键词：

fault tolerance; multilevel converter; neutralpoint-clamped (NPC) converter; postfault-handling reconfiguration; voltage oscillation;

D O I：

10.1109/TIE.2008.917072

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

This paper presents some modified topologies of the neutral-point-clamped converter. In all of them, the main change consists of adding a fourth leg, which is based on the flying-capacitor converter structure. The aim of this additional leg is to provide the converter with fault tolerance. Furthermore, during normal operation mode, this leg is able to provide a stiff neutral voltage. Consequently, the low-frequency voltage oscillations that appear at the neutral point of the standard three-level topology in some operating conditions no longer exist. As a result, the modulation strategy of the three main legs of the converter does not have to take care of voltage balance, and it can be designed to either achieve optimal output voltage spectra or improve the efficiency of the converter. Simulation and experimental results are presented to show the viability of this approach both under normal operation mode and in the event of faults.

引用

页码：982 / 995

页数：14

共 15 条

[1]

*ABB, ABB IGBTS PRESS PACK

[2] Experimental fault-tolerant control of a PMSM drive [J].

Bolognani, S ;

Zordan, M ;

Zigliotto, M .

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, 2000, 47 (05) :1134-1141

[3] A comprehensive study of neutral-point voltage balancing problem in three-level neutral-point-clamped voltage source PWM inverters [J].

Celanovic, N ;

Boroyevich, D .

IEEE TRANSACTIONS ON POWER ELECTRONICS, 2000, 15 (02) :242-249

[4] A multilevel converter topology with fault-tolerant ability [J].

Chen, A ;

Hu, L ;

Chen, LF ;

Deng, Y ;

He, XN .

IEEE TRANSACTIONS ON POWER ELECTRONICS, 2005, 20 (02) :405-415

[5]

FU JR, 1993, IAS 93, PTS 1-3, P1015, DOI 10.1109/IAS.1993.299023

[6] A unique fault-tolerant design for flying capacitor multilevel inverter [J].

Kou, XM ;

Corzine, KA ;

Familiant, YL .

IEEE TRANSACTIONS ON POWER ELECTRONICS, 2004, 19 (04) :979-987

[7] Optimized space vector switching sequences for multilevel inverters [J].

McGrath, BP ;

Holmes, DG ;

Lipo, T .

IEEE TRANSACTIONS ON POWER ELECTRONICS, 2003, 18 (06) :1293-1301

[8]

Meynard T. A., 1992, EPE Journal, V2, P45

[9] A NEW NEUTRAL-POINT-CLAMPED PWM INVERTER [J].

NABAE, A ;

TAKAHASHI, I ;

AKAGI, H .

IEEE TRANSACTIONS ON INDUSTRY APPLICATIONS, 1981, 17 (05) :518-523

[10] Effects of imbalances and nonlinear loads on the voltage balance of a neutral-point-clamped inverter [J].

Pou, J ;

Boroyevich, D ;

Pindado, R .

IEEE TRANSACTIONS ON POWER ELECTRONICS, 2005, 20 (01) :123-131

← 1 2 →