Application of HT-PSM to 180nm logic devices

被引：1

作者：

Kikuchi, Y ^{[1
]}

Seno, T ^{[1
]}

Kawanabe, K ^{[1
]}

Bunki, E ^{[1
]}

Otsuka, Y ^{[1
]}

Yamada, Y ^{[1
]}

机构：

[1] Toppan Printing Co Ltd, Div Elect, Niiza, Saitama, Japan

来源：

18TH ANNUAL SYMPOSIUM ON PHOTOMASK TECHNOLOGY AND MANAGEMENT | 1998年 / 3546卷

关键词：

HT-PSM; MoSiON; dry etch; OPC; loading effect; pattern density; proximity correction; thin Cr; border;

D O I：

10.1117/12.332876

中图分类号：

O43 [光学];

学科分类号：

070207 ; 0803 ;

摘要：

Currently various techniques,such as OPC, Beam proximity correction, are under development aiming at volume production of 180nm logic devices. 180nm lithography requires to handle critical dimensions below the light wavelength of stepper, HT-PSM is considered to be a potential solution for securing a certain process margin, and it is the case not only for "hole" patterns but for "line" patterns. On 180nm device, since the CD on reticle is sub-micron, uniformity control across iso-dense area and CD linearity become very difficult compared with simple cell-repeating patterns like memory devices. Here, under the assumption that we apply MoSiON HT-PSM to "line" pattern of 180nm device, we will report various evaluation results which are mainly related to mask making process. The conclusion is that HT-PSM has advantages over binary mask when it is applied for "line" patterns, and we could fulfill those reticle requirements by optimizing conditions of materials, dry-etcher, writing tools and beam/resist combination.

引用

页码：661 / 668

页数：8