A 2.4 GHz fully integrated cascode-cascade CMOS doherty power amplifier

被引：18

作者：

Yang, Li-Yuan ^{[1
,2
]}

Chen, Hsin-Shu ^{[1
,2
]}

Chen, Yi-Jan Emery ^{[1
,2
]}

机构：

[1] Natl Taiwan Univ, Inst Elect Engn, Grad Inst Commun Engn, Taipei 106, Taiwan

[2] Natl Taiwan Univ, Dept Elect Engn, Taipei 106, Taiwan

来源：

IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS | 2008年 / 18卷 / 03期

关键词：

CMOS; efficiency; fully integrated; orthogonal frequency division multiplexing (OFDM); peak-to-average power ratio (PAPR); power amplifier (PA); power back-off;

D O I：

10.1109/LMWC.2008.916812

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This letter presents the first CMOS Doherty power amplifier (PA) fully integrated on chip. The "cascode-cascade" amplifier architecture is proposed to get rid of the bulky power splitter and facilitate the integration. The quarter wavelength transmission lines are replaced by the lumped component networks such that the whole amplifier circuit can be squeezed into the die size of 1.97 x 1.4 mm(2). Fabricated in 0.18 mu m CMOS technology, the 3.3 V PA achieves 12 dB power gain. The measured output power and power added efficiency (PAE) at P-1dB are more than 21 dBm and 14%, respectively. The PAE at 7 dB back-off from P-1dB is above 10% and the PAE degradation is less than 29%.

引用

页码：197 / 199

页数：3

共 11 条

[1] TDCS, OFDM, and MC-CDMA: A brief tutorial [J].