PD Modulation Scheme for Three-Phase Parallel Multilevel Inverters

被引：121

作者：

Cougo, Bernardo ^{[1
]}

Gateau, Guillaume ^{[2
]}

Meynard, Thierry ^{[2
]}

Bobrowska-Rafal, Malgorzata ^{[3
]}

Cousineau, Marc ^{[2
]}

机构：

[1] Univ Toulouse, LAPLACE, F-31071 Toulouse 7, France

[2] ENSEEIHT, INPT, CNRS, LAPLACE, F-31071 Toulouse 7, France

[3] Warsaw Univ Technol, Inst Control & Ind Elect, PL-00662 Warsaw, Poland

来源：

IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS | 2012年 / 59卷 / 02期

关键词：

Interleaved converters; multilevel inverters; phase disposition (PD); three-phase inverters; FLYING CAPACITOR; CONVERTER; PWM; DESIGN; TOPOLOGIES;

D O I：

10.1109/TIE.2011.2158773

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

080201 [机械制造及其自动化];

摘要：

Pulsewidth modulation (PWM) strategies and methods for multilevel converters are usually developed for series converters. One of the aims of this paper is to show that they may be applied to parallel converters using interleaving techniques, given that these converters also have multilevel characteristics. PWM methods based on carriers' disposition and on zero sequence injection are studied for parallel multilevel inverters. Analysis show that the best method in terms of load current ripple (phase disposition (PD) centered space vector PWM) has, nevertheless, a bad influence on the current balancing between commutation cells of the same phase. Another objective is to analyze these problems and to propose a solution to cancel current imbalance when using PD strategy. Experimental results validate the analysis presented in this paper as well as the compensation of band transition of the differential mode current observed when PD strategy is used.

引用

页码：690 / 700

页数：11

共 39 条

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Modeling and DBC-PSC-PWM Control of a Three-Phase Flying-Capacitor Stacked Multilevel Voltage Source Inverter [J].