The Back-End Electronics of the Time Projection Chambers in the T2K Experiment

被引：5

作者：

Calvet, D. ^{[1
]}

Mandjavidze, I. ^{[1
]}

Andrieu, B. ^{[2
]}

Le Dortz, O. ^{[2
]}

Terront, D. ^{[2
]}

Vallereau, A. ^{[2
]}

Gutjahr, C. ^{[3
]}

Mizouchi, K. ^{[3
]}

Ohlmann, C. ^{[3
]}

Sanchez, F. ^{[4
]}

机构：

[1] CEA Saclay, Inst Rech Lois Fondamentales Univers, F-91191 Gif Sur Yvette, France

[2] IN2P3, Lab Phys Nucl & Hautes Energies, F-75252 Paris, France

[3] TRIUMF, Vancouver, BC V6T 2A3, Canada

[4] Inst Fis Altes Energies, Barcelona, Spain

来源：

IEEE TRANSACTIONS ON NUCLEAR SCIENCE | 2011年 / 58卷 / 04期

关键词：

Data acquisition systems; event building; field programmable gate arrays;

D O I：

10.1109/TNS.2011.2120621

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

Among other detectors, the T2K neutrino experiment comprises three large time projection chambers segmented into over 124.000 electronics channels. The back-end electronics system is designed to distribute a reference clock to the front-end electronics, aggregate event data over seventy-two 2 Gbit/s optical links and format events that are sent via a standard PC to the global data acquisition system of the experiment. The core of this system is a set of 18 Data Concentrator Cards based on an inexpensive commercial Field Programmable Gate Array evaluation kit with specific add-ons. We describe the adaptations that were made to the original platform, and detail the design of the firmware and software running on the embedded PowerPC processor of the FPGA of a Data Concentrator Card. We show how the intrinsic parallelism and a mixed firmware and software implementation of the data reduction and acquisition tasks lead to a flexible system capable of extracting in real time meaningful information from the 2.5 GByte/s of raw event data produced by the front-end electronics at a nominal rate of 20 Hz.

引用

页码：1465 / 1471

页数：7

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