Open Circuit Potential analysis (in combination with additional analysis techniques) is used as a fast-screening method to investigate the quality of high-k dielectric layers. Surface pretreatment prior to high-k deposition, high-k deposition techniques and temperature as well as post-deposition annealing have an effect on the etch behavior of the high-k materials. It is found that HF-last interfaces produce poor quality (non-closed layers) high-k layer depositions. Those after native oxide or rapid thermal oxidation (SiO(x)) are of a better quality (more dense). However, depositing HfO(2) on SiO(x) interfaces could result in interface reactivity with formation of silicates. Also, increased temperature high-k deposition and post deposition annealing lead to high-k layer densification (i.e. better layer quality).
