The domino sampling chip:: a 1.2 GHz waveform sampling CMOS chip

A waveform digitizing system is developed at the Paul Scherrer Institute (PSI) based on the Domino Sampling Chip (DSC), a fast analog memory fabricated in CMOS technology. The principle of operation, the test system and the performance of the chip are described. Sampling frequencies of 1.2 GI-Iz are generated on chip; the analog waveform is stored in 128 sampling capacitors. The main parameters of the chip are: timing non-linearity of 0.08%, amplitude non-linearity of 0.2% and a read-our frequency of 2.5 MHz. The design of the chip is optimized for a multi-channel board with parallel sampling of 16 input channels upon a common trigger pulse. (C) 1999 Elsevier Science B.V. All rights reserved.