A room-temperature silicon single-electron metal-oxide-semiconductor memory with nanoscale floating-gate and ultranarrow channel

被引:139
作者
Guo, LJ
Leobandung, E
Chou, SY
机构
[1] Department of Electrical Engineering, NanoStructure Laboratory, University of Minnesota, Minneapolis
关键词
D O I
10.1063/1.118236
中图分类号
O59 [应用物理学];
学科分类号
摘要
We have demonstrated a room-temperature silicon single-electron transistor memory that consists of (i) a narrow channel metal-oxide-semiconductor field-effect transistor with a width (similar to 10 nm) smaller than the Debye screening length of single electron; and (ii) a nanoscale polysilicon dot (similar to 7x7 nm) as the floating gate embedded between the channel and the control gate. We have observed that storing one electron on the floating gate can significantly screen the channel from the potential on the control gate, leading to a discrete shift in the threshold voltage, a staircase relationship between the charging voltage and the threshold shift, and a self-limiting charging process. (C) 1997 American Institute of Physics.
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页码:850 / 852
页数:3
相关论文
共 7 条
[1]  
DAVIS JR, 1980, INSTABILITIES MOS DE
[2]   10-NM ELECTRON-BEAM LITHOGRAPHY AND SUB-50-NM OVERLAY USING A MODIFIED SCANNING ELECTRON-MICROSCOPE [J].
FISCHER, PB ;
CHOU, SY .
APPLIED PHYSICS LETTERS, 1993, 62 (23) :2989-2991
[3]   10 NM SI PILLARS FABRICATED USING ELECTRON-BEAM LITHOGRAPHY, REACTIVE ION ETCHING, AND HF ETCHING [J].
FISCHER, PB ;
DAI, K ;
CHEN, E ;
CHOU, SY .
JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B, 1993, 11 (06) :2524-2527
[4]   Single electron and hole quantum dot transistors operating above 110 K [J].
Leobandung, E ;
Guo, LJ ;
Wang, Y ;
Chou, SY .
JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B, 1995, 13 (06) :2865-2868
[5]   SELF-LIMITING OXIDATION FOR FABRICATING SUB-5 NM SILICON NANOWIRES [J].
LIU, HI ;
BIEGELSEN, DK ;
PONCE, FA ;
JOHNSON, NM ;
PEASE, RFW .
APPLIED PHYSICS LETTERS, 1994, 64 (11) :1383-1385
[6]  
Tiwari S, 1996, APPL PHYS LETT, V68, P1377, DOI 10.1063/1.116085
[7]   ROOM-TEMPERATURE SINGLE-ELECTRON MEMORY [J].
YANO, K ;
ISHII, T ;
HASHIMOTO, T ;
KOBAYASHI, T ;
MURAI, F ;
SEKI, K .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1994, 41 (09) :1628-1638