A novel biasing scheme for I-MOS (impact-ionization MOS) devices

被引：36

作者：

Choi, WY ^{[1
]}

Song, JY

Lee, JD

Park, YJ

Park, BG

机构：

[1] Seoul Natl Univ, Inter Univ Semicond Res Ctr, Seoul 151742, South Korea

[2] Seoul Natl Univ, Sch Elect Engn, Seoul 151742, South Korea

来源：

IEEE TRANSACTIONS ON NANOTECHNOLOGY | 2005年 / 4卷 / 03期

关键词：

avalanche breakdown; drain induced current enhancement (DICE); impact-ionization metal-oxide semiconductor (I-MOS); novel biasing scheme; subthreshold swing;

D O I：

10.1109/TNANO.2005.847001

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A novel biasing scheme for impact-ionization metal-oxide semiconductor (I-MOS) devices was proposed based on the physics of the device, which features negative biasing at the source region. To confirm the proposed idea, we have simulated an I-MOS whose gate length is 13.0 nm. According to the simulation results, by increasing the value of the reverse source-to-body bias, we can enhance the electrical characteristics of I-MOS devices. With the source bias of -6.5 11, a 130-nm I-MOS has a threshold voltage of 0.19 V, a subthreshold swing of 3 mV/dec, and a drain induced current enhancement of 20 mV/N. The proposed biasing scheme will make the I-MOS more useful and lead it to act as an ideal switch.

引用

页码：322 / 325

页数：4

共 5 条

[1] Reverse-order source/drain formation with double offset spacer (RODOS) for low-power and high-speed application [J].

Choi, WY ;

Choi, BY ;

Woo, DS ;

Lee, JD ;

Park, BG .

IEEE TRANSACTIONS ON NANOTECHNOLOGY, 2003, 2 (04) :210-216

[2]

Gopalakrishnan K, 2002, INTERNATIONAL ELECTRON DEVICES 2002 MEETING, TECHNICAL DIGEST, P289, DOI 10.1109/IEDM.2002.1175835

[3]

Lundstrom M, 2003, 2003 IEEE INTERNATIONAL ELECTRON DEVICES MEETING, TECHNICAL DIGEST, P789

[4]

Selberherr S., 1984, ANAL SIMULATION SEMI

[5]

WOLF S, 1995, SILICON PROCESSING V

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