A 1-V 1.8-MHz CMOS switched-opamp SC filter with rail-to-rail output swing

被引:88
作者
Baschirotto, A
Castello, R
机构
[1] Dipartimento di Elettronica, Universitá di Pavia
关键词
switched-capacitor filters;
D O I
10.1109/4.643656
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A low-voltage switched capacitor (SC) filter operated from a single 1 V supply and realized in a standard 0.5-mu m CMOS technology is presented. Proper operation is obtained using the switched-opamp technique without any clock voltage multiplier or low-threshold devices. This makes the circuit compatible with future deep submicrometer technology. As opposed to previous switched-opamp implementations, the filter uses a fully differential topology. This allows operation with a rail-rail output swing and reduction of the number of opamps required to build high-order infinite impulse response (IIR) filters. On the other hand, a law-voltage common-mode feedback (CMFB) circuit is required. In addition, the circuit uses an opamp which is only partially turned off during the off phase. This enables an increase in the maximum sampling frequency. The filter implements a bandpass response (f(s)/f(o) = 4, Q = 7) and it has been characterized with a 1.8 MHz sampling frequency. Its power consumption is about 160 mu W. The filter is still fully functional down to 0.9 V supply voltage.
引用
收藏
页码:1979 / 1986
页数:8
相关论文
共 17 条
[1]  
ADACHI T, IEEE 1990 CUST INT C
[2]   DESIGN STRATEGY FOR LOW-VOLTAGE SC CIRCUITS [J].
BASCHIROTTO, A ;
CASTELLO, R ;
MONTECCHI, F .
ELECTRONICS LETTERS, 1994, 30 (05) :378-380
[3]   1.5-V HIGH-PERFORMANCE SC FILTERS IN BICMOS TECHNOLOGY [J].
CASTELLO, R ;
TOMASINI, L .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1991, 26 (07) :930-936
[4]  
CASTELLO R, Patent No. 7183434
[5]  
CASTELLO R, 1994, Patent No. 8303185
[6]  
CASTELLO R, 1836, Patent No. 326107
[7]  
CASTELLO R, 1995, IEEE T CIRCUITS SYST, V2, P827
[8]   SWITCHED-OPAMP - AN APPROACH TO REALIZE FULL CMOS SWITCHED-CAPACITOR CIRCUITS AT VERY-LOW POWER-SUPPLY VOLTAGES [J].
CROLS, J ;
STEYAERT, M .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1994, 29 (08) :936-942
[9]   ON-CHIP HIGH-VOLTAGE GENERATION IN MNOS INTEGRATED-CIRCUITS USING AN IMPROVED VOLTAGE MULTIPLIER TECHNIQUE [J].
DICKSON, JF .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1976, 11 (03) :374-378
[10]  
HAIGH DG, 1988, IEEE P ISCAS, P1987