APGAN and RPMC: Complementary heuristics for translating DSP block diagrams into efficient software implementations

被引:19
作者
Bhattacharyya, SS [1 ]
Murthy, PK [1 ]
Lee, EA [1 ]
机构
[1] UNIV CALIF BERKELEY,DEPT ELECT ENGN & COMP SCI,BERKELEY,CA 94720
关键词
dataflow programming; synchronous dataflow; memory management; multirate signal processing algorithms; SDF compiler; on-chip memory; clustering; minimum cuts; dynamic programming;
D O I
10.1023/A:1008806425898
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Dataflow has proven to be an attractive computational model for graphical DSP design environments that support the automatic conversion of hierarchical signal flow diagrams into implementations on programmable processors. The synchronous dataflow (SDF) model is particularly well-suited to dataflow-based graphical programming because its restricted semantics offer strong formal properties and significant compile-time predictability, while capturing the behavior of a large class of important signal processing applications. When synthesizing software for embedded signal processing applications, critical constraints arise due to the limited amounts of memory. In this paper, we propose a solution to the problem of jointly optimizing the code and data size when converting SDF programs into software implementations. We consider two approaches. The first is a customization to acyclic graphs of a bottom-up technique, called pairwise grouping of adjacent nodes (PGAN), that was proposed earlier for general SDF graphs. We show that our customization to acyclic graphs significantly reduces the complexity of the general PGAN algorithm, and we present a formal study of our modified PGAN technique that rigorously establishes its optimality for a certain class of applications. The second approach that we consider is a top-down technique, based on a generalized minimum-cut operation, that was introduced recently in [14]. We present the results of an extensive experimental investigation on the performance of our modified PGAN technique and the top-down approach and on the tradeoffs between them. Based on these results, we conclude that these two techniques complement each other, and thus, they should both be incorporated into SDF-based software implementation environments in which the minimization of memory requirements is important. We have implemented these algorithms in the Ptolemy software environment [5] at UC Berkeley.
引用
收藏
页码:33 / 60
页数:28
相关论文
共 18 条
[1]  
ADE M, 1994, IEEE WKSH RAP SYST P
[2]  
[Anonymous], 1979, Computers and Intractablity: A Guide to the Theoryof NP-Completeness
[3]  
Bhattacharyya S.S., 1996, Software Synthesis from Data~ow Graphs
[4]  
BHATTACHARYYA SS, 1995, M953 UCBERL
[5]  
BHATTACHARYYA SS, 1993, J VLSI SIGNAL PR DEC
[6]  
BUCK J, 1995, INT J COMPUTER S JAN
[7]  
Cormen T. H., 1990, INTRO ALGORITHMS
[8]  
FAVRI J, 1982, AUTOMATIC STORAGE OP
[9]  
KERNIGHAN B, 1970, BELL SYSTEM TECH FEB
[10]  
LAUWEREINS R, 1994, GRAPE, V2