The STAR DAQ receiver board

被引:4
作者
LeVine, MJ [1 ]
Ljubicic, A [1 ]
Schulz, MW [1 ]
Scheetz, R [1 ]
Consiglio, C [1 ]
Padrazo, D [1 ]
Zhao, Y [1 ]
机构
[1] Brookhaven Natl Lab, Upton, NY 11973 USA
关键词
D O I
10.1109/23.846131
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Data digitized on the STAR TPC detector are transmitted via 1.5 Gbit/sec optical fiber to the DAO receiver boards (RB) located in Sector VME crates. The RE contains the optical receiver, Clink decoder, high speed bus to deliver data to three Mezzanines, which perform the processing. The RE back end provides an interface between VME64 and PCI, serving as interconnect between all of the Mezzanines, the VME bus, and resources local to the receiver board. Each Mezzanine hosts an Intel I960HD superscalar RISC CPU, which performs 2-dimensional cluster-finding and data formatting. Dual-ported VRAM provide storage for 12 TPC events. Incoming data are processed in real time by a bank of ASICs which perform pedestal subtraction, 10-bit to 8-bit compression via table lookup, and compilation of a sequence pointer bank for use by the CPU during cluster-finding. Communication among the I960s and the master CPU in the VME crate takes place through mailboxes and doorbells implemented in the I960-PCI bridge chips.
引用
收藏
页码:127 / 131
页数:5
相关论文
共 3 条
[1]  
BOTLO M, 1998, IEEE T NUCL SCI, V45, P117
[2]  
HARRIS JW, 1998, P 14 WINT WORKSH NUC, P127
[3]  
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