Simulations and experiments of etching of silicon in HBr plasmas for high aspect ratio features

被引:16
作者
Hwang, HH [1 ]
Meyyappan, M
Mathad, GS
Ranade, R
机构
[1] NASA, Ames Res Ctr, Moffett Field, CA 94035 USA
[2] Infineon Technol Inc, Hopewell Jct, NY 12533 USA
来源
JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B | 2002年 / 20卷 / 06期
关键词
D O I
10.1116/1.1513621
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Etching in semiconductor processing typically involves using halides because of the relatively fast rates. Bromine-containing plasmas can generate high aspect ratio trenches, desirable for dynamic random access memory and microelectromechanical system applications, with relatively straight sidewalls. We present scanning electron microscope images for silicon-etched trenches in a HBr plasma. Using a feature profile simulation, we show that the removal yield parameter, or number of neutrals removed per incident ion due to all processes (sputtering, spontaneous desorption, etc.), dictates the profile shape. We find that the profile becomes pinched off when the removal yield is a constant, with a maximum aspect ratio (AR) of about 5 to 1 (depth to height). When the removal yield decreases with increasing ion angle, the etch rate increases at the corners and the trench bottom broadens. The profiles have ARs of over 9:1 for yields that vary with ion angle. To match the experimentally observed etched time of 250 s for an AR, of 9:1 with a trench width of 0.135 mum, we find that the neutral flux must be 3.336 X 10(17) cm(2) s(-1). (C) 2002 American Vacuum Society.
引用
收藏
页码:2199 / 2205
页数:7
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