An introduction to plasma etching for VLSI circuit technology

被引:24
作者
Layadi, N
Colonell, JI
Lee, JTC
机构
[1] Bell Labs, Murray Hill, NJ 07974 USA
[2] Bell Labs, VLSI Proc Technol Dev Org, Orlando, FL USA
关键词
D O I
10.1002/bltj.2184
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
In this review article, various aspects of plasma etching for very large scale integrated (VLSI) circuit technology are presented. The motivation for using plasma etching and the advantages of this dry etching technique over wet etching are discussed. Principal reactor designs are described and key VLSI materials involved in etching are highlighted. Applications for pattern definition of gate electrodes, contacts, vias, and metallic interconnects are presented. Emphasis is placed on etching rates, uniformity, anisotropy, selectivity, and critical dimension control. The potentially damaging effects of plasma processing on gate oxide are also briefly reviewed.
引用
收藏
页码:155 / 171
页数:17
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