Verilog: Accelerating digital design

被引:4
作者
Blair, GM
机构
[1] Univ of Edinburgh, Edinburgh
来源
ELECTRONICS & COMMUNICATION ENGINEERING JOURNAL | 1997年 / 9卷 / 02期
关键词
D O I
10.1049/ecej:19970203
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
At a first glance, Verilog is simply a language for digital hardware simulation, but in practice it has become the linchpin for a complete design flow from concept to digital component. This article describes the ideas behind the language and its growing role in digital design.
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页码:68 / 72
页数:5
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