SPICE simulation and tradeoffs of CMOS LNA performance with source-degeneration inductor

被引:21
作者
Tsui, HY [1 ]
Lau, J [1 ]
机构
[1] Hong Kong Univ Sci & Technol, Dept Elect & Elect Engn, Consumer Media Lab, Kowloon, Peoples R China
关键词
CMOS low noise amplifier; high-frequency SPICE model; impedance matching;
D O I
10.1109/82.818895
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
In this brief, we study the tradeoffs of CMOS low noise amplifiers using source-degeneration inductor with both experimental data and simulation data. SPICE models based on the quasistatic (QS) assumption ignores the channel resistance and leads designers to overly rely on source-degeneration inductance. The non-QS model is much better. Source inductor adversely affects noise and gain. The parasitic capacitance at the gate imposes additional challenges for matching.
引用
收藏
页码:62 / 65
页数:4
相关论文
共 5 条
[1]   A robust and physical BSIM3 non-quasi-static transient and AC small-signal model for circuit simulation [J].
Chan, MS ;
Hui, KY ;
Hu, CM ;
Ko, PK .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1998, 45 (04) :834-841
[2]  
OU JJ, 1998, S VLSI TECHN
[3]   Substrate noise coupling through planar spiral inductor [J].
Pun, ALL ;
Yeung, T ;
Lau, J ;
Clement, FJR ;
Su, DK .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1998, 33 (06) :877-884
[4]   0.15-μm RF CMOS technology compatible with logic CMOS for low-voltage operation [J].
Saito, M ;
Ono, M ;
Fujimoto, R ;
Tanimoto, H ;
Ito, N ;
Yoshitomi, T ;
Ohguro, T ;
Momose, HS ;
Iwai, H .
IEEE TRANSACTIONS ON ELECTRON DEVICES, 1998, 45 (03) :737-742
[5]   A 1.5-V, 1.5-GHz CMOS low noise amplifier [J].
Shaeffer, DK ;
Lee, TH .
IEEE JOURNAL OF SOLID-STATE CIRCUITS, 1997, 32 (05) :745-759