Failure diagnosis of discrete-event systems with linear-time temporal logic specifications

被引:100
作者
Jiang, SB [1 ]
Kumar, R
机构
[1] GM R&D Planning, Warren, MI 48090 USA
[2] Iowa State Univ, Dept Elect & Comp Engn, Ames, IA 50011 USA
基金
美国国家科学基金会;
关键词
diagnosability; discrete-event system (DES); failure diagnosis; linear-time temporal logic;
D O I
10.1109/TAC.2004.829616
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
The paper studies failure diagnosis of discrete-event systems (DESs) with linear-time temporal logic (LTL) specifications. The LTL formulas are used for specifying failures in the system. The LTL-based specifications make the specification specifying process easier and more user-friendly than the formal language/automata-based specifications; and they can capture the failures representing the violation of both liveness and safety properties, whereas the prior formal language/automaton-based specifications can capture the failures representing the violation of only the safety properties (such as the occurrence of a faulty event or the arrival at,a failed state). Prediagnosability and diagnosability of DESs in the temporal logic setting are defined. The problem of testing prediagnosability and diagnosability is reduced to the problem of model checking. An algorithm for the test of prediagnosability and diagnosability, and the synthesis of a diagnoser is obtained. The complexity of the algorithm is exponential in the length of each specification LTL formula, and polynomial in the number of system states and the number of specifications. The requirement of nonexistence of unobservable cycles in the system, which is needed for the diagnosis algorithms in prior methods to work, is relaxed. Finally, a simple example is given for illustration.
引用
收藏
页码:934 / 945
页数:12
相关论文
共 45 条
[1]  
[Anonymous], 1995, MODELING CONTROL LOG
[2]  
[Anonymous], 1990, HDB THEORETICAL COMP
[3]   A method for the synthesis of controllers to handle safety, liveness, and real-time constraints [J].
Barbeau, M ;
Kabanza, F ;
St-Denis, R .
IEEE TRANSACTIONS ON AUTOMATIC CONTROL, 1998, 43 (11) :1543-1559
[4]  
BAVISHI S, 1998, P 1994 IEEE INT S IN, P213
[5]  
Biere A, 1999, LECT NOTES COMPUT SC, V1579, P193
[6]  
Bouloutas A., 1990, Network Management and Control, P319
[7]   SIMPLE FINITE-STATE FAULT DETECTORS FOR COMMUNICATION-NETWORKS [J].
BOULOUTAS, A ;
HART, GW ;
SCHWARTZ, M .
IEEE TRANSACTIONS ON COMMUNICATIONS, 1992, 40 (03) :477-479
[8]  
CHEN YL, 1999, P 38 IEEE C DEC CONT, P1756
[9]   Bounded model checking using satisfiability solving [J].
Clarke, E ;
Biere, A ;
Raimi, R ;
Zhu, Y .
FORMAL METHODS IN SYSTEM DESIGN, 2001, 19 (01) :7-34
[10]  
Clarke EM, 1999, MODEL CHECKING, P1